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vishay siliconix dg2002 document number: 71448 s-72609-rev. c, 24-dec-07 www.vishay.com 1 low-voltage single spdt analog switch features ? low voltage operation (1.8 v to 5.5 v) ? low on-resistance - r ds(on) : 7 ? fast switching - t on : 8 ns, t off : 6 ns ? low charge injection - q inj : 5 pc ? low power consumption ? ttl/cmos compatible ? 6-pin sc70 package benefits ? reduced power consumption ? simple logic interface ? high accuracy ? reduce board space applications ? cellular phones ? communication systems ? portable test equipment ? battery operated systems ? sample and hold circuits description the dg2002 is a single-pole/double-throw monolithic cmos analog switch designed for high performance switching of analog signals. combining low power, high speed (t on : 8 ns, t off : 6 ns), low on-resistance (r ds(on) : 7 ) and small physical size (sc70), the dg2002 is ideal for portable and battery powered applications requiring high performance and efficient use of board space. the dg2002 is built on vishay siliconix?s low voltage ji2 process. an epitaxial layer prevents latchup. break-before - make is guaranteed for dg2002. each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. functional block diagram and pin configuration * pb containing terminations are not rohs compliant, exemptions may apply. no (source 1 ) com nc (source 2 ) 1 2 3 6 5 top view in v+ gnd 4 sc-70 device marking: e2xx truth table logic nc no 0onoff 1offon ordering information temp range package part number - 40 to 85 c sc70-6 dg2002dl-t1 DG2002DL-T1-E3 a v aila b le p b -free rohs* compliant
www.vishay.com 2 document number: 71448 s-72609-rev. c, 24-dec-07 vishay siliconix dg2002 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. all leads welded or soldered to pc board. c. derate 3.1 mw/c above 70 c. absolute maximum ratings parameter limit unit referenced v+ to gnd - 0.3 to +6 v in, com, nc, no a - 0.3 to (v+ + 0.3) continuous current (any terminal) 50 ma peak current (pulsed at 1 ms, 10 % duty cycle) 200 storage temperature - 65 to + 150 c power dissipation (packages) b 6-pin sc70 c 250 mw specifications v+ = 2.0 v parameter symbol test conditions unless otherwise specified v+ = 2.0 v, 10 % v in = 0.4 or 1.6 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 1.8 v, v com = 1.0 v, i no , i nc = 10 ma room full d 38 39.3 46.1 47.1 r on flatness d r on flatness v+ = 1.8 v, v com = 0 to v+, i no , i nc = 10 ma room 21 switch off leakage current f i no(off) i nc(off) v+ = 2.2 v v no , v nc = 0.5 v/1.5 v, v com = 1.5 v/0.5 v room full d - 250 - 3.0 250 3.0 pa na i com(off) room full d - 250 - 3.0 250 3.0 pa na channel-on leakage current f i com(on) v+ = 2.2 v, v no , v nc = v com = 0.5 v/1.5 v room full d - 250 - 3.0 250 3.0 pa na digital control input high voltage v inh full 1.6 v input low voltage v inl full 0.4 input capacitance d c in full 3 pf input current i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 1.5 v, r l = 300 , c l = 35 pf figures 1 and 2 room full d 22 31 32 ns turn-off time t off room full d 10 17 18 break-before-make time t d room 1 12 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 5 10 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 67 db crosstalk d x ta l k room - 71 no, nc off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 5 pf channel-on capacitance d c on room 29 power supply power supply range v+ 1.8 2.2 v power supply current d i+ v in = 0 or v+ 0.01 1.0 a power consumption p c 2.2 w
document number: 71448 s-72609-rev. c, 24-dec-07 www.vishay.com 3 vishay siliconix dg2002 specifications v+ = 3.0 v parameter symbol test conditions unless otherwise specified v+ = 3 v, 10 % v in = 0.4 or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance d r on v+ = 2.7 v, v com = 1.5 v, i no , i nc = 10 ma room full 12.2 13 14.8 15.8 r on flatness d r on flatness v+ = 2.7 v, v com = 0 to v+, i no , i nc = 10 ma room 5 switch off leakage current f i no(off) i nc(off) v+ = 3.3 v v no , v nc = 1 v/3 v, v com = 3 v/1 v room full - 500 - 4.0 500 4.0 pa na i com(off) room full - 500 - 4.0 500 4.0 pa na channel-on leakage current f i com(on) v+ = 3.3 v, v no , v nc = v com = 1 v/3 v room full - 500 - 4.0 500 4.0 pa na digital control input high voltage v inh full 2 v input low voltage v inl full 0.4 input capacitance d c in full 3 pf input current i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 2.0 v, r l = 300 , c l = 35 pf figures 1 and 2 room full 12 21 22 ns turn-off time d t off room full 714 15 break-before-make time d t d room 1 6 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 5 10 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 67 db crosstalk d x ta l k room - 69 no, nc off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 5 pf channel-on capacitance d c on room 29 power supply power supply range v+ 2.7 3.3 v power supply current i+ v in = 0 or v+ 0.01 1.0 a power consumption p c 3.3 w
www.vishay.com 4 document number: 71448 s-72609-rev. c, 24-dec-07 vishay siliconix dg2002 notes: a. room = 25 c, full = as determined by the operating suffix. b. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. guarantee by design, nor s ubjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications v+ = 5.0 v parameter symbol test conditions unless otherwise specified v+ = 5 v, 10 % v in = 0.8 or 2.4 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc, v com full 0 v+ v on-resistance r on v+ = 4.5 v, v com = 3 v, i no , i nc = 10 ma room full 6.4 7.4 7.8 8.8 r on flatness d r on flatness v+ = 4.5 v, v com = 0 to v+, i no , i nc = 10 ma room 3 switch off leakage current i no(off), i nc(off) v+ = 5.5 v v no , v nc = 1 v/4.5 v, v com = 4.5 v/1 v room full - 1.0 - 4.0 1.0 4.0 na i com(off) room full - 1.0 - 4.0 1.0 4.0 channel-on leakage current i com(on) v+ = 5.5 v, v+ = 5.5 v v no , v nc = v com = 1 v/4.5 v room full - 1.0 - 4.0 1.0 4.0 digital control input high voltage v inh full 2.4 v input low voltage v inl full 0.8 input capacitance c in full 3 pf input current i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 3 v, r l = 300 , c l = 35 pf figures 1 and 2 room full 815 16 ns turn-off time d t off room full 613 14 break-before-make time d t d room 1 4 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 5 10 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 69 db crosstalk d x ta l k room - 69 source-off capacitance d c no(off), c nc(off) v in = 0 or v+, f = 1 mhz room 5 pf channel-on capacitance d c on room 29 power supply power supply range v+ 4.5 5.5 v power supply current i+ v in = 0 or v+ 0.01 1.0 a power consumption p c 5.5 w
document number: 71448 s-72609-rev. c, 24-dec-07 www.vishay.com 5 vishay siliconix dg2002 typical characteristics 25 c, unless otherwise noted r on vs. v com and supply voltage supply current vs. temperature leakage current vs. temperature - on-resistance ( ) r on 0 5 10 15 20 25 30 35 40 012345 v com - analog voltage (v) v+ = 1.8 v v+ = 2 v v+ = 3 v v+ = 5 v - 60 - 40 - 20 0 2 0 4 0 6 0 8 0 100 10 1 0.01 temperature (c) i+ - supply current (na) 0.1 v+ = 5 v v in = 0 v - 60 - 40 - 20 0 2 0 4 0 6 0 8 0 100 1000 1 100 leakage current (pa) temperature (c) 10000 v+ = 5 v 10 i no ( o f f ) /i nc( of f) i co m( on) i co m ( of f) r on vs. analog voltage and temperature supply current vs. input switching frequency leakage vs. analog voltage 0 5 10 15 20 25 30 35 0123456 - on-resistance ( ) r on v co m - analog voltage (v) v+ = 2 v v+ = 5 v 85 c - 40 c 25 c 85 c - 40 c 25 c 10 m input switching frequency (hz) 10 k 1 m 10 m 100 k 1 k 100 10 i+ - supply current (a) 1 n 1 m 100 10 1 10 n 100 n - 150 - 100 - 50 0 50 100 150 012345 v com , v no , v nc - analog voltage leakage current (pa) v+ = 5 v t = 25 c i no ( o f f ) /i nc( of f) i com(on) i co m ( of f)
www.vishay.com 6 document number: 71448 s-72609-rev. c, 24-dec-07 vishay siliconix dg2002 typical characteristics 25 c, unless otherwise noted switching time vs. temperature and supply voltage switching threshold vs. supply voltage 0 5 10 15 20 25 30 - 60 - 40 - 2 0 0 2 04 06 08 0 100 t on v+ = 2 v temperature (c) t on , t off - switching time (ns) t on v+ = 3 v t on v+ = 5 v t off v+ = 2 v t off v+ = 3 v t off v+ = 5 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0123456 v+ - supply voltage (v) v t - switching threshold (v) insertion loss, off -isolation crosstalk vs. frequency charge injection vs. analog voltage - 100 - 30 0 loss, o irr, x frequenc y (hz) - 20 - 10 10 m 1 g 100 m 1 m 100 k - 40 - 50 - 60 - 70 - 80 - 90 t alk (db) v+ = 3 v r l = 50 loss oirr x talk - 20 - 15 - 10 - 5 0 5 10 15 20 0123456 v com - analog v oltage (v) q - charge injection (pc) v+ = 2 v v+ = 3 v v+ = 5 v v+ = 2.5 v
document number: 71448 s-72609-rev. c, 24-dec-07 www.vishay.com 7 vishay siliconix dg2002 test circuits figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. switch output 0.9 x v out t r < 5 ns t f < 5 ns v inh v inl v out =v com r l r l +r on figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d in com v+ gnd v+ c l 35 pf v o r l 300 v inh v inl figure 3. charge injection off on on in v out v out q = v out x c l c l = 1 nf com r gen v out nc or no v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined by sense of switch. +
www.vishay.com 8 document number: 71448 s-72609-rev. c, 24-dec-07 vishay siliconix dg2002 test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?71448 . figure 4. off-isolation in gnd nc or no 0v, 2.4 v 10 nf com off isolation 20 log v com v no/ nc r l analyzer v+ v+ = figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
l c e e 1 e d e 1 a 2 a a 1 1 -a- b -b- 23 654 package information vishay siliconix document number: 71154 06-jul-01 www.vishay.com 1

dim min nom max min nom max a 0.90 ? 1.10 0.035 ? 0.043 a 1 ? ? 0.10 ? ? 0.004 a 2 0.80 ? 1.00 0.031 ? 0.039 b 0.15 ? 0.30 0.006 ? 0.012 c 0.10 ? 0.25 0.004 ? 0.010 d 1.80 2.00 2.20 0.071 0.079 0.087 e 1.80 2.10 2.40 0.071 0.083 0.094 e 1 1.15 1.25 1.35 0.045 0.049 0.053 e 0.65bsc 0.026bsc e 1 1.20 1.30 1.40 0.047 0.051 0.055 l 0.10 0.20 0.30 0.004 0.008 0.012 7 nom 7 nom ecn: s-03946?rev. b, 09-jul-01 dwg: 5550
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